AMD Rumoured to Start Production of Next-Gen FX-Chips in Q3

From X-bit Labs: Advanced Micro Devices will commence production of its next-generation high-performance x86 central processing units for high-end desktops and servers in the third quarter of the year, a media report claims. The new chips will improve instructions per clock performance of existing chips by at least 15%, the story claims.

AMD will start volume manufacturing of code-named Vishera microprocessors with up to eight Piledriver-class x86 cores sometimes in the third quarter of 2012, according to a news-report from Donanimhaber web-site. Although the web-site specifically notes next-generation FX-series processors known as Vishera, it is highly likely that the company will initiate production of Viperfish dies in general that will power both code-named "Vishera" FX products for desktops as well as code-named "Seoul" and "Abu Dhabi" Opteron chips for servers.

AMD recently indicated that the AMD FX "Vishera" central processing units sport up to eight Piledriver (next-generation Bulldozer) x86 cores, dual-channel DDR3 memory controller and are compatible with AM3+ infrastructure as well as Scorpius platform featuring AMD 990FX core-logic sets. Although the new platform has its own code-name "Volan", some sources refer to it as "Scorpius Refresh".

It is interesting to note that the Donanimhaber indicates that instruction per clock (IPC) performance of Vishera will be 15% higher compared to that of current-generation Zambezi thanks to Piledriver micro-architecture as well as some other tweaks. Earlier it was widely believed that FX "Vishera" chips will only bring 10% speed improvement at the same clock-speed compared to the currently available chips.

As it appears from AMD's documents revealed earlier this year, starting from Piledriver micro-architecture and going forward, AMD's Fusion accelerated processing units (chips that integrate both x86 and stream processing cores) will feature "reduced", or "early" micro-architectural feature-set, whereas central processing units based on new designs will feature "full" or "late" feature-set. As a result, x86 performance of the former will be lower than x86 performance of the latter.

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